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The XC95144XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns.Features• 5 ns pin-to-pin logic delays• System frequency up to 178 MHz• 144 macrocells with 3,200 usable gates• Available in small footprint packages- 100-pin TQFP (81 user I/O pins)- 144-pin TQFP (117 user I/O pins)- 144-CSP (117 user I/O pins)- Pb-free available for all packages• Optimized for high-performance 3.3V systems- Low power operation- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5Vsignals- 3.3V or 2.5V output capability- Advanced 0.35 micron feature size CMOSFast FLASH™ technology• Advanced system features- In-system programmable- Superior pin-locking and routability withFast CONNECT™ II switch matrix- Extra wide 54-input Function Blocks- Up to 90 product-terms per macrocell withindividual product-term allocation- Local clock inversion with three global and oneproduct-term clocks- Individual output enable per output pin with localinversion- Input hysteresis on all user and boundary-scan pininputs- Bus-hold circuitry on all user pin inputs- Full IEEE Standard 1149.1 boundary-scan (JTAG)• Fast concurrent programming• Slew rate control on individual outputs• Enhanced data security features• Excellent quality and reliability- Endurance exceeding 10,000 program/erasecycles- 20 year data retention- ESD protection exceeding 2,000V• Pin-compatible with 5V-core XC95144 device in the100-pin TQFP packageWARNING: Programming temperature range ofTA = 0° C to +70° C
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