General Description

The MC68HC908EY16 is a member of the low-cost, high-performance M68HC08 Family of 8-bit

microcontroller units (MCUs). All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.

Features

Standard features of the MC68HC908EY16 include:

• High-performance M68HC08 architecture optimized for C-compilers

• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families

• 8-MHz internal bus frequency at 5V

• Internal oscillator requiring no external components:

– Software selectable bus frequencies

– 25 percent accuracy with a trimming capability of better than 1 percent

– Clock monitor

– Option to allow use of external clock source or external crystal/ceramic resonator

• 15,872 bytes of on-chip FLASH memory with in-circuit programming

• FLASH program memory security(1)

• 512 bytes of on-chip random-access memory (RAM)

• Low voltage inhibit (LVI) module

• Internal clock generator module (ICG)

• Two 16-bit, 2-channel timer (TIMA and TIMB) interface modules with selectable input capture, output compare, and pulse-width modulation (PWM) capability on each channel

• 8-channel, 10-bit successive approximation analog-to-digital converter (ADC)

• Enhanced serial communications interface module (ESCI) for local interconnect network (LIN)

connectivity

• Serial peripheral interface (SPI)

• Timebase Module (TBM)

• 5-bit keyboard interrupt (KBI) with wakeup feature

• 24 general-purpose input/output (I/O) pins

• External asynchronous interrupt pin with internal pullup (IRQ)

• System protection features:

– Optional computer operating properly (COP) reset

– Illegal opcode detection with reset

– Illegal address detection with reset

• 32-pin quad flat pack (QFP) package

• Low-power design; fully static with stop and wait modes

• Internal pullups on IRQ and RST to reduce customer system cost

• Standard low-power modes of operation:

– Wait mode

– Stop mode

• Master reset pin (RST) and power-on reset (POR)

• BREAK module (BRK) to allow single breakpoint setting during in-circuit debugging

• Higher current source capability on nine port lines for LED drive (PTA6/SS, PTA5/SPSCK,

PTA4/KBD4, PTA3/KBD3, PTA2/KBD2, PTA1/KBD1, PTA0/KBD0, PTC1/MOSI, and PTC0/MISO)

Features of the CPU08 include:

• Enhanced HC05 programming model

• Extensive loop control functions

• 16 addressing modes (eight more than the HC05)

• 16-bit index register and stack pointer

• Memory-to-memory data transfers

• Fast 8 × 8 multiply instruction

• Fast 16 ÷ 8 divide instruction

• Binary-coded decimal (BCD) instructions

• Optimization for controller applications

• Third party C language support

If you need to read the code from the protected chip MC68HC908EY16. we can help you to crack the MCU and extract the code from MC68HC908EY16 succesfully. Welcome to contact us by Email or Skype.

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Description

The AT88SC0104C member of the CryptoMemory® family is a high-performance secure memory providing 1 Kbit of user memory with advanced security and cryptographic features built in. The user memory is divided into four 32-byte zones, each of which may be individually set with different security access rights or effectively combined together to provide space for 1 to 4 data files.

Features

• One of a Family of 9 Devices with User Memories from 1 Kbit to 256-Kbit

• 1-Kbit (128-byte) EEPROM User Memory

⎯ Four 32 byte (256 bit) Zones

⎯ Self-timed Write Cycle

⎯ Single Byte or 16-byte Page Write Mode

⎯ Programmable Access Rights for Each Zone

• 2-Kbit Configuration Zone

⎯ 37-byte OTP Area for User-defined Codes

⎯ 160-byte Area for User-defined Keys and Passwords

• High Security Features

⎯ 64-bit Mutual Authentication Protocol (Under License of ELVA)

⎯ Encrypted Checksum

⎯ Stream Encryption

⎯ Four Key Sets for Authentication and Encryption

⎯ Eight Sets of Two 24-bit Passwords

⎯ Anti-tearing Function

⎯ Voltage and Frequency Monitor

• Smart Card Features

⎯ ISO 7816 Class A (5V) or Class B (3V) Operation

⎯ ISO 7816-3 Asynchronous T = 0 Protocol (Gemplus® Patent) *

⎯ Multiple Zones, Key Sets and Passwords for Multi-application Use

⎯ Synchronous 2-wire Serial Interface for Faster Device Initialization *

⎯ Programmable 8-byte Answer-To-Reset Register

⎯ ISO 7816-2 Compliant Modules

• Embedded Application Features

⎯ Low Voltage Operation: 2.7V to 5.5V

⎯ Secure Nonvolatile Storage for Sensitive System or User Information

⎯ 2-wire Serial Interface

⎯ 1.0 MHz Compatibility for Fast Operation

⎯ Standard 8-lead Plastic Packages, Green Compliant (exceeds RoHS)

⎯ Same Pinout as 2-wire Serial EEPROM’s

• High Reliability

⎯ Endurance: 100,000 Cycles

⎯ Data Retention: 10 years

⎯ ESD Protection: 4,000V min

Smart Card Applications

The AT88SC0104C provides high security, low cost, and ease of implementation without the need for a microprocessor operating system. The embedded cryptographic engine provides for dynamic and symmetric mutual authentication between the device and host, as well as performing stream encryption for all data and passwords exchanged between the device and host. Up to four unique key sets may be used for these operations. The AT88SC0104C offers the ability to communicate with virtually any smart card reader using the asynchronous T = 0 protocol (Gemplus Patent) defined in ISO 7816-3.

Embedded Applications

Through dynamic and symmetric mutual authentication, data encryption, and the use of encrypted checksums, the AT88SC0104C provides a secure place for storage of sensitive information within a system. With its tamper detection circuits, this information remains safe even under attack. A 2-wire serial interface running at 1.0 MHz is used for fast and efficient communications with up to 15 devices that may be individually addressed. The AT88SC0104C is available in industry standard 8-lead packages with the same familiar pinout as 2-wire serial EEPROMs.

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• Single-chip integrated USB 2.0 transceiver, SIE, and enhanced 8051 microprocessor

• Fit, form and function compatible with the FX2

—Pin-compatible

—Object-code-compatible

—Functionally-compatible (FX2LP functionality is a superset of the FX2)

• Draws no more than 85 mA in any mode making the FX2LP suitable for bus powered applications

• Software: 8051 runs from internal RAM, which is:

—Downloaded via USB

—Loaded from EEPROM

—External memory device (128-pin configuration only)

• 16 KBytes of on-chip Code/Data RAM

• Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints

—Buffering options: double, triple, and quad

• Additional programmable (BULK/INTERRUPT) 64-byte endpoint

• 8- or 16-bit external data interface

• Smart Media Standard ECC generation

• GPIF

—Allows direct connection to most parallel interfaces; 8- and 16-bit

—Programmable waveform descriptors and configuration registers to define waveforms

—Supports multiple Ready (RDY) inputs and Control (CTL) outputs

• Integrated, industry standard 8051 with enhanced features

—Up to 48-MHz clock rate

—Four clocks per instruction cycle

—Two USARTS

—Three counter/timers

—Expanded interrupt system

—Two data pointers

• 3.3V operation with 5V tolerant inputs

• Smart SIE

• Vectored USB interrupts

• Separate data buffers for the Setup and DATA portions of a CONTROL transfer

• Integrated I2C controller, runs at 100 or 400 kHz

• 48-MHz, 24-MHz, or 12-MHz 8051 operation

• Four integrated FIFOs

—Brings glue and FIFOs inside for lower system cost

—Automatic conversion to and from 16-bit buses

—Master or slave operation

—FIFOs can use externally supplied clock or asynchronous strobes

—Easy interface to ASIC and DSP ICs

• Vectored for FIFO and GPIF interrupts

• Up to 40 general purpose I/Os

• Four package options—128-pin TQFP, 100-pin TQFP, 56-pin QFN and 56-pin SSOP Lead-Free

• USB 2.0-compatible

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